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| 1 2740b?pmgmt?05/03 features 300ma/1.8v/2.5v switching regulator for baseband supply 2.8v/80ma ldo for baseband pad supply two 130ma/2.8v low-noise, high psrr rf ldo voltage regulators 130ma/2.7v/2.8v baseband low-noise, high psrr analog ldo regulator ultra low-power rtc ldo voltage regulator backup battery charger li-ion or li-polymer battery charger controller buzzer and vibrator drivers charging led driver power management start-up controller and reset generation sim level shifters and sim 10ma/1.8v/2.8v ldo voltage regulator ultra-low sleep mode current consumption (17 a typ) over and under voltage protections over temperature protection low-power mode and sleep mode straight and easy interfacing to any baseband controller small 5x5mm, forty-nine ball fbga package description the at73c202 is a low-cost, ultra low-power, power and battery management ic designed to interface directly with state-of-the-art cellular phones, for example with 2.5g gsm phones. it includes all required power supplies tailored to be fully compati- ble with the sub-systems of recent mobile phone chipsets, including the rf, analog and digital (dsp, microcontroller, memories) sections. the at73c202 integrates a step-down dc-dc converter that supplies 300 ma with internal switches and two levels of voltage programming for the baseband core (1.8v and 2.5v). a low-power mode is available in order to minimize standby current con- sumption during the ?quiet? transmission periods. in addition, the at73c202 includes a lowcost battery charger, using a simple external pnp transistor for li-ion or li-polymer batteries. battery operating conditions are maintained within safe limits under hardware control during the start-up procedure (when the phone is turned on or a charger is plugged in). the battery pre-charge is also integrated and self-operated by the at73c202. on completion the fast charge and end-of-charge procedure is transferred to the baseband software. the at73c202 integrates 7 low-dropout linear regulators specifically designed to sup- ply rf (x2), analog, memories, etc. it also includes a back-up battery charger and an ultra low-power regulator dedicated to the baseband real-time clock (rtc) supply dur- ing sleep mode. the hardwired start-up mechanism (power management controller state machine) ensures safe telephone operation during the wake-up and shut-down procedures, and during the multiple real-life operating conditions of a mobile phone (such charger plug- in, plug-out, battery plug-in, plug-out, low or dead battery, etc.). the at73c202 is packaged into a 49 ball (7x7 matrix), 0.65mm pitch, 5mm x 5mm outline fbga package. power management for mobiles (pm) at73c202 power and battery management unit for cellular phone preliminary
2 at73c202 2740b?pmgmt?05/03 functional diagram figure 1. at73c202 functional diagram charger controller reset generator dc-dc converter 1.8v/2.5v 300ma i/o pad ldo 2.8v/130ma analog ldo 2.7v/2.8v/130ma bat-rtc 2.4v/2.7v/2ma vcc-rtc 1.5v/0.5ma rf1 ldo 2.8v/130ma rf2 ldo 2.8v/130ma vibrator ldo 2.8v/130ma sim level shifter d1 en-ana-b on-off up-on-off dc-on en en en vin > 2.6v en vbat res-b lx v-core gnd-reg1 v-pad a-vcc v-bck v-rtc v-rf1 v-rf2 v-vib gnd-rf sim-vcc sim-rst sim-clk sim-io a-gnd led-out buz-gnd buz-out chg-in chg flash-led bat-volt vin-reg1 eco-mode vin-reg2 vin-rf en-rf1 en-rf2 en-vib vin-vib buz-in d-vcc sim-en sim-1v8/2v8 reset-in clk-in data-io aa-gnd bb1 cref vref e1 c2 f6 f7 g4 g7 b6 b4 a7 a6 b7 b1 a1 a2 e7 b3 a4 e3 f1 f2 e2 g2 f3 e4 f4 g3 g1 c5 e6 d7 c4 b2 a3 c7 a5 d6 b5 d5 c6 g5 g6 d4 e5 f5 c1 c3 d2 gate-chg d3 d-gnd sim ldo 1.8v/2.8v/10ma 3 at73c202 2740b?pmgmt?05/03 pin description table 1 . at73c202 pin description signal ball type description charger block chg-in d2 power supply ac/dc adapter input gate-chg d3 o external pnp control output chg c3 i charger command from base band chip dc-on d6 o ac/dc adapter detector output bat-volt f5 o resistance divider output flash-led c1 i flash led input led-out c2 o led output (charging phase indicator) vbat (v bat1 ) e1 power supply battery charger power on block on-off d5 i key on/off input up-on-off c6 i hold the power on from base band chip res-b f6 o reset open collector output aa-gnd e5 ground analog ground baseband supply block vin-reg1 (v bat2 ) g6 power supply input supply for dc/dc converter lx f7 o dc/dc converter output inductor eco-mode g5 i dc/dc converter output (base band chip core supply) v-core g4 o dc/dc converter output (base band chip core supply) gnd-reg1 g7 ground ground of dc/dc converter vin-reg2 (v bat3 ) a5 input supply for base band ldo en-ana-b b5 i enable the analog ldo a-vcc b4 o analog ldo output (base band chip analog supply) a-gnd a7 ground ground of a-vcc, v-pad and rtc ldo v-pad b6 o digital ldo output (base band chip digital pad supply) v-rtc b7 o base band rtc supply output v-bck a6 o back-up battery rtc charger rf supply block vin-rf (v bat4 ) a3 power supply input supply for rf ldo en-rf1 b2 i enable ldo rf1 en-rf2 c4 i enable ldo rf2 v-rf1 b1 o rf1 ldo output gnd-rf a2 ground ground of rf1 & rf2 ldo v-rf2 a1 o rf2 ldo output 4 at73c202 2740b?pmgmt?05/03 vibrator and buzzer driver block vin-vib (v bat5 ) d7 power supply input vibrator ldo en-vib e6 i vibrator driver input (from base band chip) v-vib e7 o vibrator ldo output buz-in c5 i buzzer driver input (from base band chip) buz-out b3 o buzzer output (connected to the buzzer) buz-gnd a4 ground ground of buzzer output sim interface block d-vcc g1 power supply digital supply for sim base band chip interface sim-en g3 i input to power on the sim sim-1v8/2v8 f4 i input to select the sim level (1.8v or 2.8v) reset-in e4 i reset input from base band chip clk-in f3 i clock input from base band chip data-io g2 io data input/output from base band chip sim-vcc e3 o sim power supply (1.8v or 2.8v) sim-rst f1 o sim reset output sim-clk f2 o sim clock output sim-io e2 io sim data input/output miscellaneous cref c7 io band gap decoupling d-gnd d1 ground ground for digital (charger, sim & vibrator) bb1 d4 i chip configuration: bb1 = 0: first platform bb1 = 1: second platform table 1 . at73c202 pin description (continued) signal ball type description 5 at73c202 2740b?pmgmt?05/03 application schematic figure 2. at73202 application schematic sim-vcc c007 charger controller reset generator dc-dc converter 1.8v/2.5v 300ma i/o pad ldo 2.8v/130ma analog ldo 2.7v/2.8v/130ma rtc ldo bat-rtc 2.4v/2.7v/2ma vcc-rtc 1.5v/0.5ma rf1 ldo 2.8v/130ma rf2 ldo 2.8v/130ma vibrator ldo 2.8v/130ma vbat res-b lx v-core gnd-reg1 v-pad a-vcc v-bck v-rtc v-rf1 v-rf2 v-vib gnd-rf sim-rst sim-clk sim-io d1 a-gnd led-out chg-in chg flash-led bat-volt vin-reg1 eco-mode en-ana-b on-off up-on-off dc-on en en en vin-reg2 vin-rf vin>2.6v en en-rf1 en-rf2 en-vib vin-vib buz-gnd buz-out buz-in d-vcc sim-en sim-1v8/2v8 reset-in clk-in data-io aa-gnd bb1 cref vref e1 c2 f6 f7 g4 g7 b6 b4 a7 a6 b7 b1 a1 a2 e7 b3 a4 e3 f1 f2 e2 g2 f3 e4 f4 g3 g1 c5 e6 d7 c4 b2 a3 c7 a5 d6 b5 d5 c6 g5 g6 d4 e5 f5 c1 c3 d2 gate-ch d3 r001 r002 l001 c002 c003 c004 r003 c005 backup battery c006 vib c010 c009 battery pack t001 charging device protection circuit vpad c013 sim-vcc c012 c011 vcore or vpad c014 vbattery v-bck vbattery 32 ohm buzzer rf2 supply rf1 supply rtc supply analog supply logic periphery supply logic core supply to logic reset input c015 c001 c008 vbattery vbattery c016 sim level shifter and regulator 1.8v/2.8v sim ldo 1.8v/2.8v/10ma d-gnd 6 at73c202 2740b?pmgmt?05/03 external components specifications table 2 . external component specifications symbol parameters r001 4.7 k ?, 1/8 w, 0603 r002 4.7 k ?, 1/8 w, 0603 r003 2 k ?, 1/8 w, 0603 c001, c003, c004, c005, c006, c007, c010, c012 2.2f - x5r 6.3v/10%, 0603 c002 22 f tantale r, typea c009, c011, c015 220 nf - x5r 10v/10%, 0603 c008, c013, c016 10 nf - x5r 10v/10%, 0402 c014 10 f - x5r 6.3v/10% l001 10 h t001 fmmt593 sot23 pnp 7 at73c202 2740b?pmgmt?05/03 power on control block this block generates the power on and power off for the at73c202. power on is activated when one of these conditions is true: the ac/dc charger is plugged (chg-in input): the dc-on pin is then set to high level on/off key is set to high level, which sets the on-off pin to high level up-on/off is set to high level to achieve all power on, the conditions below must be true: battery must be higher than normal operating voltage (v battery > 3.2v) thermal protection is right (t j < 120c) when the on/off key is pressed (tied to v bat ), the power-en goes to high level and activates the base band chip core supply. as the base band chip detects the on/off, it must drive up-on/off to high level in order to maintain the power-en at high level and the on/off key can be released. when the on/off key is pressed again to power off, the base band chip releases the up-on/off pin to low level. note that up-on/off can also be generated as a wake-up alarm when the phone is in off mode (the up-on/off pin is supplied by the back-up battery on v-rtc (1.0v to 1.8v). charger controller block there are three specific phases of battery charging: pre-charge when v bat < 3.2v with 50 ma pulsed current stopped by either software or hardware if v bat > 3.6v or the software crashes. fast charge with c o current by software pulse charging with c o current for end of charge by software. note: c o equals 600 ma when the battery capacity equals 600mah. fast charging and pulse charging use only one switch. the pre-charging will be done using a pulse charging c o during 100 ms each second. pre-charging phase when the base band chip is powered off and battery voltage is under 3.2v, the charge must be performed by the at73c202. to ensure no damage occurs, the current is limited to 50 ma or nominal capacity divided by 10 (c o / 10). when the base band chip is powered on and sets chg at high level the pre-charge phase is finished. in case of a software crash after power on, a watchdog timer of 10s will set the res-b to "0" and turn off the device. pulse & fast charging in this phase, the base band chip controls the charge through the chg pin and monitors the battery voltage and temperature through bat-volt on the at73c202 and temper- ature through any available temperature sensor in the battery pack. when battery voltage is under 4.1v, the charger is always active (chg is high level). as soon as battery voltage exceeds 4.1v, the software enters into a pulse charging phase. the pulse charging stops when battery voltage reaches 4.2v. flash-led description during the pre-charging phase, the phone is off. to indicate the pre-charging is cur- rently running, a led driver (led-out, open drain) is turned on every second for 100ms. during the fast charge and pulse charging, the baseband can control the led driver through the flash-led pin. 8 at73c202 2740b?pmgmt?05/03 absolute maximum ratings recommended operating conditions power supply current consumption operating temperature (industrial).......-40 c to +85 c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reli- ability. storage temperature............................-55c to + 150c power supply input v bat and vin-regx pins .........................-0.3v to +6.5v power supply input chg-in.................... ....-0.3v to +8v i/o input (all except to power supply) . -0.3v to v max +0.3 table 3 . recommended operating conditions parameter conditions min maw unit operating temperature -40 85 c power supply input v bat and v in -regx pins 3.0 4.5 v power supply input chg-in 4.6 5.5 v table 4 . power supply current consumption on v bat (fully charged backup battery) mode condition typ max unit mode1 (sleep) 1.2v < v bat < 2.5v 6.8 8 a mode2 (sleep) 2.5 v 10 at73c202 2740b?pmgmt?05/03 note: 1. v out and i out refer to v-core. i qc quiescent current ldo mode (eco-mode = 1) 11 14 a ? v dcld static load regulation ldo mode (0 to 10 ma) 50 mv ? v trld transient load regulation ldo mode (0 to 10 ma), t r = t f = 5s 10 mv ? v dcle static line regulation ldo mode (3.2v to 4.2v) 8 mv ? v trle transient line regulation ldo mode (3.2v to 4.2v) 15 mv psrr ripple rejection ldo mode up to 1 khz 40 45 db ? v lpfp overshoot voltage voltage drop from ldo (lp) to dc-dc(fp) 010mv ? v fplp undershoot voltage voltage drop from dc-dc (fp) to ldo (lp) -15 0 mv table 7 . v-core dc to dc external components symbol parameter conditions min typ max unit c out output capacitor value 17 22 26 f c esr output capacitor esr 100 m ? l out output inductor value 8 10 12 h l esr output inductor esr at 100 khz 1.1 ? table 6 . v-core (1) dc to dc electrical characteristics (continued) symbol parameter conditions min typ max unit 11 at73c202 2740b?pmgmt?05/03 a-vcc ? analog t amb = -20c to 85c, v bat = 3v to 4.2v unless otherwise specified. note: 1. v out and i out refer to a-vcc. table 8 . a-vcc (1) ? analog electrical characteristics symbol parameter conditions min typ max unit v bat operating supply voltage all v in , all t c, line, load 3 5.5 v v out (1) output voltage bb1 = 0 2.65 2.7 2.75 v v out output voltage bb1 = 1 2.75 2.80 2.85 v v int internal supply voltage 2.4 2.6 v i out (1) output current 80 130 ma i qc quiescent current 195 236 a dv out line regulation v bat : 3v to 3.4v, i out = 130 ma 3 mv dv peak line regulation transient same as above, t r = t f = 5 s 4 mv dv out load regulation 10% - 90% i out , v bat = 3v 10 mv 10% - 90%i out , v bat = 5.0v 15 mv 10% - 90% i out , v bat = 5.5v 15 mv dv peak load regulation transient same as above, t r = t f = 5 s 15 mv psrr ripple rejection f = 217hz ? v bat = 3.6v 70 db v n output noise bw: 10 hz to 100 khz 29 v rms t r rise time 100% i out , 10% - 90% v out 50 s t f fall time i sd shut down current 1a table 9 . a-vcc ? analog external components symbol parameter conditions min typ max unit c out output capacitor value 1.98 2.2 2.42 f c esr output capacitor esr 100 khz 50 m ? 12 at73c202 2740b?pmgmt?05/03 v-pad ? pad supply t amb = -20c to 85c, v bat = 3v to 4.2v unless otherwise specified. note: 1. v out and i out refer to v-pad. table 1 0. v-pad (1) ? pad supply electrical characteristics symbol parameter conditions min typ max unit v out (1) output voltage full power mode 2.74 2.8 2.86 v i out (1) output current full power mode 50 80 ma i out output current low power mode 10 ma i qc quiescent current fp mode 25 30 36 a i qc quiescent current lp mode 9.75 11.5 13.75 a dv out line regulation fp mode v bat : 3.4v to 3v, i out = 80 ma 1 mv dv peak line regulation transient fp mode v bat : from 5v to 5.4v and from 3.4v to 3v, i out = 80 ma, t r = t f = 5 s 3mv dv out line regulation lp mode v bat : 3.4v to 3v, i out = 5 ma 3 mv dv peak line regulation transient lp mode v bat : from 5v to 5.4v and from 3.4v to 3v, i out = 5 ma, t r = t f = 5 s 4mv dv out load regulation fp mode from 0 to 80ma & from 90% to 10% i out(max) , v bat = 3.4v 5 (4 at 5.5v) mv dv peak load regulation transient fp mode from 0 to i out(max) & from 90% to 10% i out(max) , t r = t f = 5 s, v bat = 3.4v 23 mv dv out load regulation lp mode from 0 to 80ma & from 90% to 10% i out(max) , v bat = 3.4v 5 (10 at 5.5v) mv psrr ripple rejection f = 217hz 40 45 db v n output noise fp mode bw: 10 hz to 100 khz 80 v rms v n output noise lp mode bw: 10 hz to 100 khz 300 v rms t r rise time fp i out = i out(max) 70 130 s t r rise time lp i out = i out(max) 50 170 s i sd shut down current 1a v bat operating supply voltage 3 5.5 v v sauv internal operating supply voltage 2.74 2.8 2.86 v i sc short circuit current 50 80 ma table 1 1. v-pad ? pad supply external components symbol parameter conditions min typ max unit c out output capacitor value 1.98 2.2 2.42 f c esr output capacitor esr 100 khz 50 m ? 13 at73c202 2740b?pmgmt?05/03 backup battery ldo (v-bck) t amb = -20c to 85c, v bat = 3v to 4.2v unless otherwise specified. note: 1. v out and i out refer to v-bck. rtc ldo (v-rtc) t amb = -20c to 85c, v bat = 3v to 4.2v unless otherwise specified. note: 1. v out and i out refer to v-rtc table 1 2. backup battery ldo (v-bck) (1) electrical characteristics symbol parameter conditions min typ max unit v out (1) output voltage bb1 = 0 2.4 2.45 2.50 v v out (1) output voltage bb1 = 1 2.65 2.7 2.75 v i out (1) output current 25ma v drop dropout voltage 50 mv i qc quiescent current 4.8 6.6 9.7 a psrr ripple rejection 40 db t r rise time 110 320 s table 1 3. backup battery ldo (v-bck) external components symbol parameter conditions min typ max unit c out output capacitor value 1.98 2.2 2.42 f c esr output capacitor esr 100 khz 100 m ? table 1 4. rtc ldo ( v-rtc ) (1) electrical characteristics symbol parameter conditions min typ max unit v out (1) output voltage bb1 = 0 1.45 1.50 1.55 v bb1 = 1 (not used) i out (1) output current 0.5 ma v drop dropout voltage 50 mv i qc quiescent current 4.8 6.6 9.7 a i sd shutdown current 0.1 1 a psrr ripple rejection 40 db t r rise time 110 320 s table 1 5. rtc ldo ( v-rtc ) external components symbol parameter conditions min typ max unit c out output capacitor value 198 220 242 nf c esr output capacitor esr 100 khz 100 m ? 14 at73c202 2740b?pmgmt?05/03 rf ldos (v-rf1 and v-rf2) note: 1. v out and i out refer to v-rf1/v-rf2. table 1 6. rf ldos (v-rf1 and v-rf2) (1) electrical characteristics symbol parameter conditions min typ max unit v bat operating supply voltage all v in , all tc, line, load 3 5.5 v v int operating internal supply voltage 2.4 2.5 2.6 v v out (1) output voltage 2.74 2.8 2.86 v i out (1) output current 80 130 ma i qc quiescent current 195 236 a dv out line regulation v bat : 3v to 3.4v, i out = 130 ma 3 2 mv dv peak line regulation transient same as above, t r = t f = 5 s 4 2.85 mv dv out load regulation 10% - 90% i out , v bat = 3v 10 1 mv 10% - 90% i out , v bat = 5.0v 15 1 mv 10% - 90% i out , v bat = 5.5v 15 1 mv dv peak load regulation transient same as above, t r = t f = 5 s 1.2 2.4 mv psrr ripple rejection f=217hz ? v bat = 3.6v 70 73 db v n output noise bw: 10 hz to 100 khz 29 37 v rms t r rise time 100% i out , 10% - 90% v out 50 s i sd shut down current 1a table 1 7. rf ldos (v-rf1 and v-rf2) external components symbol parameter conditions min typ max unit c out output capacitor value 1.98 2.2 2.42 f c esr output capacitor esr 100 khz 50 m ? 15 at73c202 2740b?pmgmt?05/03 buzzer open drain general conditions (unless otherwise noted): v in = v in(min) to v in(max) , t a = -40c to +85c note: 1. v ol , i ol , i oh , t on and t off refer to buz-out. vibrator general conditions (unless otherwise noted): v in = v in(min) to v in(max) , t a = -40c to +85c, c out = 2.2f to y5v . note: 1. v out and i out refer to v-vib. table 1 8. buzzer open drain electrical characteristics (1) symbol parameter conditions min typ max unit v ol (1) low output voltage i ol = 100 ma 0.4 v i ol (1) low output current 100 ma t on (1) turn-on time 10 s t off (1) tu r n -o f f t i m e 10 s table 1 9. vibrator electrical characteristics (1) symbol parameter conditions min typ max unit v out (1) output voltage 2.74 2.80 2.86 v i out (1) output current 100 ma v drop dropout voltage 280 mv i qc quiescent current 195 236 a 16 at73c202 2740b?pmgmt?05/03 digital pin parameters conditions: t amb = -20c to 85c, v bat = 3v to 4.2v unless otherwise specified table 2 0. digital pins. symbol parameter conditions min typ max unit dc-on v ol output low voltage gnd v oh output high voltage v-pad i oh output current 1 ma i ol output current 1 ma i oh leakage current 1a on/off v ih high input voltage i ih(max) = 20 a 0.7x v bat v bat v v il low input voltage i il(max) = 20 a gnd 0.3 x v bat v i il low input current 0.1 a i ih high input current 0.1 a up-on/off v ih high input voltage i ih(max) = 20 a 0.7x v rtc v-bck v v il low input voltage i il(max) = 20 a gnd 0.3x v rtc v i il low input current 0.1 a i ih high input current 0.1 a eco-mode v ih high input voltage 1.5 v-pad v v il low input voltage i il(max) = 20 a gnd 0.6 v i il low input current 0.1 a i ih high input current 0.1 a res-b (1) v ol output low voltage i ol =1 ma and v pa d = v pa d ( m a x ) 0.2 v i oh output leakage current 0.1 1 a i ol output current 1ma t reset output delay time 20 100 ms i ss supply current 4 5 a i off standby current 0.1 1 a chg v il input low voltage gnd 0.6 v v ih input high voltage 1.5 v-pad v i il input low current 0.1 a i ih input high current 0.1 a r down pull-down resistance chg pin 1 1.5 1.8 m ? 17 at73c202 2740b?pmgmt?05/03 note: 1. v in = 1.2v to v pad(max) . the reset generator has an open collector output. it is enabled only when v core is active. flash-led & led-out pins t on on time external transistor is closed 60 80 100 ms tperiod 0.911.1s v ol low output voltage i out = 5 ma 0.4 v i ol low output current 5ma i oh leakage current 1a v il low input voltage 0.4 v v ih high input voltage 1.5 v i il input low current 0.1 a i ih input high current 0.1 a r down pull-down resistance flash-led pin 1 1.5 1.8 m ? en-rf1, en-rf2 v ih high input voltage iih(max) = 20 a 0.7 x v core v-pad v v il low input voltage iil(max) = 20 a gnd 0.3 x v core v i il low input current 0.1 a i ih high input current 0.1 a r down pull-down resistance 1 1.5 1.8 m ? buz-in v ih high input voltage i ih(max) = 20 a 1.5 v-pad v v il low input voltage i il(max) = 20 a gnd 0.6 v i ih high input current buz-in pin 0.1 a i il low input current buz-in pin 0.1 a r down pull-down resistance buz-in pin 1 1.5 1.8 m ? en_vib v ih high input voltage i ih(max) = 20 a (en-vib) 1.5 v-pad v v il low input voltage i il(max) = 20 a (en-vib) gnd 0.6 v i il low input current (en-vib) 0.1 a i ih high input current (en-vib) 0.1 a r down pull-down resistance en-vib pin 1 1.5 1.8 m ? table 2 0. digital pins. (continued) symbol parameter conditions min typ max unit 18 at73c202 2740b?pmgmt?05/03 sim interface conditions are dv cc = 1.8v or 2.8v, t a = -40 c to +85 c, c dvcc = 100 nf, csim- v cc = 100 nf table 2 1. sim interface electrical characteristics. symbol parameter conditions min typ max unit power supply dv cc digital supply voltage mandatory 1.65 3.0 v i dvcc dv cc operating current clk_in at 3.25 mhz 2.5 10 a v sim-vcc sim-v cc output voltage i sim-vcc < 10 ma sim-en = dv cc sim-1v8/2v8 = dv cc 1.71 1.8 1.89 v v sim-vcc sim-v cc output voltage i sim-vcc < 10ma sim-en = dv cc sim-1v8/2v8 = gnd 2.74 2.8 2.86 v i sim-vcc sim-v cc operating current i sim-vcc -> sim card = 0 i sim-clk = 3.25 mhz 25 100 a i shdn total shutdown current i sim-vcc + i dvcc with sim-en = gnd 0.1 1 a i qc sim_ldo quiescent current low-power mode 8 9.5 a i qc sim_ldo quiescent current full-power mode 60 a i out output current 10 ma i sc short circuit current 40 ma digital interface (reset-in, clock-in, data-io) i ih , i il input current clk-in, rst-in, sim-en, sim- 1v8/2v8 -0.1 0.1 a i ih input current data-io -20 20 a i il input current data-io 1 ma v ih high input voltage clk-in, rst-in, data-io, sim-en, sim-1v8/2v8 0.7x dv cc v v il low input voltage clk-in, rst-in, data-io, sim-en, sim-1v8/2v8 0.3x dv cc v v oh high output voltage data-io, source current = 20 a 0.7x dv cc v v oh high output voltage data-io, source current = 5 a 0.8x dv cc v v ol low output voltage data-io, sink current = 200 a 0.4 v r data-io pull-up resistance between data-io and dv cc 13 20 28 k ? t r t f rise and fall time data-io loaded with 30 pf 1.3 2 s 19 at73c202 2740b?pmgmt?05/03 note: 1. sim-v cc = sv cc sim interface (sim-rst, sim-clk, sim-data) v ih high input voltage sim-data with i ih(max) = 20 a (1) 0.7xsv cc v v il low input voltage sim-data with i il(max) = 1 ma 0.3 v v oh high output voltage sim-data, source current = 20 a (1) 0.8xsv cc v v ol low output voltage sim-data, sink current = 200 a 0.4 v v oh high output voltage sim-rst, sim-clk with source current = 20a (1) 0.9xsv cc v v ol low output voltage sim-rst, sim-clk with sink current = 200 a 0.4 v i ih high input current sim-data 20 a i il low input current sim-data 1 ma v sd shutdown output voltage sim-data, sim-clk, sim-rst, sim-v cc with sim-en = gnd, with sink current = 200 a 0.4 v r sim-data pull-up resistance between sim-data and sim-v cc 6.5 10 14 k ? t r , t f rise and fall time sim-data, sim-rst loaded with 50 pf 1s t r , t f rise and fall time sim-clk loaded with 50 pf 18 ns f sim-clk maximum frequency sim-clk loaded with 50 pf 5 mhz table 2 1. sim interface electrical characteristics. (continued) symbol parameter conditions min typ max unit 20 at73c202 2740b?pmgmt?05/03 package outline (top view) figure 3. forty-nine ball fbga package (top view) 7 6 5 4 3 2 1 v-rf2 gnd-rf vin-rf buz-gnd vin-reg2 v-bck a-gnd b a 7 6 5 4 3 2 1 en-rf1 buz-out a-vcc en-ana-b v-pad v-rtc v-rf1 7 6 5 4 3 2 1 7 6 5 4 3 2 1 7 6 5 4 3 2 1 7 6 5 4 3 2 1 7 6 5 4 3 2 1 data-io d-vcc sim-en v-core eco-mode gnd-reg1 g sim-rst sim-clk clk-in bat-volt res-b lx f sim-io vbat sim-vcc reset-in aa-gnd en-vib v-vib e d-gnd chg-in gate-chg bb1 on-off dc-on vin-vib d led-out flash-led chg en-rf2 buz-in up-on-off cref c sim-1v8/2v8 vin-reg1 printed on recycled paper. disclaimer: atmel corporation makes no warranty for the use of its products, other than those expressly contained in the company?s standar d warranty which is detailed in atmel?s terms and conditions located on the company?s web site. the company assumes no responsibi lity for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time wi thout notice, and does not make any commitment to update the information contained herein. no licenses to patents or other intellectual property of atmel are granted by the company in connection with the sale of atmel products, expressly or by implication. atmel?s products are not aut horized for use as critical components in life support devices or systems. atmel corporation atmel operations 2325 orchard parkway san jose, ca 95131 tel: 1(408) 441-0311 fax: 1(408) 487-2600 regional headquarters europe atmel sarl route des arsenaux 41 case postale 80 ch-1705 fribourg switzerland tel: (41) 26-426-5555 fax: (41) 26-426-5500 asia room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon hong kong tel: (852) 2721-9778 fax: (852) 2722-1369 japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (81) 3-3523-3551 fax: (81) 3-3523-7581 memory 2325 orchard parkway san jose, ca 95131 tel: 1(408) 441-0311 fax: 1(408) 436-4314 microcontrollers 2325 orchard parkway san jose, ca 95131 tel: 1(408) 441-0311 fax: 1(408) 436-4314 la chantrerie bp 70602 44306 nantes cedex 3, france tel: (33) 2-40-18-18-18 fax: (33) 2-40-18-19-60 asic/assp/smart cards zone industrielle 13106 rousset cedex, france tel: (33) 4-42-53-60-00 fax: (33) 4-42-53-60-01 1150 east cheyenne mtn. blvd. colorado springs, co 80906 tel: 1(719) 576-3300 fax: 1(719) 540-1759 scottish enterprise technology park maxwell building east kilbride g75 0qr, scotland tel: (44) 1355-803-000 fax: (44) 1355-242-743 rf/automotive theresienstrasse 2 postfach 3535 74025 heilbronn, germany tel: (49) 71-31-67-0 fax: (49) 71-31-67-2340 1150 east cheyenne mtn. blvd. colorado springs, co 80906 tel: 1(719) 576-3300 fax: 1(719) 540-1759 biometrics/imaging/hi-rel mpu/ high speed converters/rf datacom avenue de rochepleine bp 123 38521 saint-egreve cedex, france tel: (33) 4-76-58-30-00 fax: (33) 4-76-58-34-80 e-mail literature@atmel.com web site http://www.atmel.com 2740b?pmgmt?05/03 0m ? atmel corporation 2003 . all rights reserved. atmel ? and combinations thereof are the registered trade- marks of atmel corporation or its subsidiaries. other terms and product names may be the trademarks of oth- ers. |
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